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Senior ASIC Verification Engineer Interview Experience - Santa Clara, California

June 1, 2014
Neutral ExperienceGot Offer

Process

I was contacted on LinkedIn. An initial phone interview was scheduled within a few days, followed by a 4-hour onsite interview with 5 people (45 minutes each). The fifth interviewer was the team manager.

The phone interview was very standard, covering topics such as data structures, UVM, ASIC performance, and Big O notation.

The onsite interview was divided as follows:

  • UVM basics and testbench development
  • Cache design
  • C++ questions (strings, arrays, data structures, etc.)
  • Digital Design questions
  • General overview and background questions (with the group manager).

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Interview Statistics

The following metrics were computed from 1 interview experience for the Nvidia Senior ASIC Verification Engineer role in Santa Clara, California.

Success Rate

0%
Pass Rate

Nvidia's interview process for their Senior ASIC Verification Engineer roles in Santa Clara, California is extremely selective, failing the vast majority of engineers.

Experience Rating

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Neutral100%
Negative0%

Candidates reported having mixed feelings for Nvidia's Senior ASIC Verification Engineer interview process in Santa Clara, California.

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