Good access to large-scale GPU clusters, exciting work, business-oriented
Good access to large-scale GPU clusters, exciting work, business-oriented
Health, vision, and dental benefits, ESPP stock purchase plan, WFH equipment resources, Intern gifts sent from the headquarter.
Framework-specific engineering work in deep learning may be mundane to some, but as I got more familiar, things became interesting. I may need to take some time off work to stick to deadlines.
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Nvidia Interview Experiences
System Software Engineer
It was good. They asked some technical questions about C++ and low-level systems. Then we went over OOP (Object-Oriented Programming) concepts. He was genuinely nice and interested to hear about my experience.
Senior Software Engineer
I was contacted by a recruiter after applying. Then, all correspondence seemed like boilerplate scheduling emails; I don't think the recruiter/scheduler spent any time crafting custom responses. I did an initial informational/technical screening, fo
Senior ASIC Design Engineer
The interview process consisted of two tech screens, followed by a panel. Interview questions were standard design problems, targeting both Verilog coding ability and problem-solving skills. Interviewers looked more at thought process than specific s
System Software Engineer
Santa Clara, California, United StatesNovember 21, 2025It was good. They asked some technical questions about C++ and low-level systems. Then we went over OOP (Object-Oriented Programming) concepts. He was genuinely nice and interested to hear about my experience.
Senior Software Engineer
Santa Clara, California, United StatesNovember 9, 2025I was contacted by a recruiter after applying. Then, all correspondence seemed like boilerplate scheduling emails; I don't think the recruiter/scheduler spent any time crafting custom responses. I did an initial informational/technical screening, fo
Senior ASIC Design Engineer
Santa Clara, California, United StatesNovember 4, 2025The interview process consisted of two tech screens, followed by a panel. Interview questions were standard design problems, targeting both Verilog coding ability and problem-solving skills. Interviewers looked more at thought process than specific s
