Tasks are challenging and are always near the cutting edge of design and process. Flexible work hours are offered, and you can easily work remotely.
RSUs/Options were not given for most engineers, and salary is average.
Many nighttime meetings occur due to the worldwide team.
Workload is hard, and schedules are aggressive.
Slowly, more politics are entering the office.
Keep teams co-located. Having teams across multiple time zones is hard. Work to keep office politics to a minimum.
The interview process consisted of two tech screens, followed by a panel. Interview questions were standard design problems, targeting both Verilog coding ability and problem-solving skills. Interviewers looked more at thought process than specific s
Initial communications, process, and follow-ups were good. The interview process was organized very well. Technical rounds covered basics to advanced topics, including verification, STA, design, and etc. They looked at whether I had worked on verif
The interview was managed very professionally. The questions asked were purely technical and related to the basic fundamentals of electronic design/chip design.
The interview process consisted of two tech screens, followed by a panel. Interview questions were standard design problems, targeting both Verilog coding ability and problem-solving skills. Interviewers looked more at thought process than specific s
Initial communications, process, and follow-ups were good. The interview process was organized very well. Technical rounds covered basics to advanced topics, including verification, STA, design, and etc. They looked at whether I had worked on verif
The interview was managed very professionally. The questions asked were purely technical and related to the basic fundamentals of electronic design/chip design.