Good learning opportunity. Good work atmosphere.
Work is hectic.
Work-life balance is sometimes affected.
Mostly questions around your previous work. * Design * Verification environment * Basic design techniques, etc. Another round focused mostly on digital design basics, synthesis, timing, and DFT basics. Questions included setup/hold time, etc
It was an okay type of interview. It was a normal interview. There were three people in the interview. Two of them were asking questions. They asked me five questions: * One question was from the written test. * One question was from Verilog.
The interviewer seemed to be a senior-level engineer and asked basic questions about digital system design. They repeated the OA (online assessment) questions. I was also asked to solve a SystemVerilog question. Cache and other architecture-relate
Mostly questions around your previous work. * Design * Verification environment * Basic design techniques, etc. Another round focused mostly on digital design basics, synthesis, timing, and DFT basics. Questions included setup/hold time, etc
It was an okay type of interview. It was a normal interview. There were three people in the interview. Two of them were asking questions. They asked me five questions: * One question was from the written test. * One question was from Verilog.
The interviewer seemed to be a senior-level engineer and asked basic questions about digital system design. They repeated the OA (online assessment) questions. I was also asked to solve a SystemVerilog question. Cache and other architecture-relate