Taro Logo

ASIC Design and Design Verification Engineer Interview Experience - Markham, Canada

May 1, 2012
Neutral ExperienceNo Offer

Process

3 rounds of interviews from different groups, from 11 am to 4 pm, including lunch time.

Questions

They focused a lot on OOP, which was unexpected given the title that I applied.

Was this helpful?

Interview Statistics

The following metrics were computed from 1 interview experience for the Qualcomm ASIC Design and Design Verification Engineer role in Markham, Ontario.

Success Rate

0%
Pass Rate

Qualcomm's interview process for their ASIC Design and Design Verification Engineer roles in Markham, Ontario is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Qualcomm's ASIC Design and Design Verification Engineer interview process in Markham, Ontario.

Qualcomm Work Experiences