Qualcomm India Private Limited (QIPL or QC India) was granted "Dream Status of Recruitment" at BIT Mesra, owing to its attractive compensation package and tremendous reputation in the semiconductor industry. Qualcomm India conducted a well-organized campus recruitment process, which comprised the following steps:

Preliminary Rounds:

• Initial Shortlisting on the Basis of CGPA & Resume: Depending on the highest CGPA of the batch and branch, Qualcomm fixes its CGPA cut-off, which was 7.5 for BIT Mesra. The resumes of interested applicants were provided to the recruiter for an initial screening; however, there were no eliminations at this step. Out of 114 applicants from the branches of CSE, ECE, EEE, and IT, 98 students were declared eligible for the Online Test (OT), strictly based on the CGPA cut-off decided earlier (selection ratio >= 90%).

Online Round:

• Platform: HirePro The Online Test (OT) is designed scientifically, where you have to select your area of specialization at the beginning. The choices provided were:

  1. Electronics
  2. Communication
  3. Software

  The OT is divided into three sections:

  1. Basic Aptitude & Mathematical Reasoning
  2. Coding Fundamentals
  3. Area of Specialization opted for at the beginning

  Each section comprises 20 MCQ questions, and the time allotted per section is 25 minutes. You must take up the sections in the order mentioned; there is no provision to switch between sections. A buffer time is available upon completion of each section, which is on the candidate. It is not advised to rush into the next section when you finish one.

  The details of the questions in the individual sections are as follows:

  1. Basic Aptitude & Mathematical Reasoning: The aptitude section comprises CAT or higher-level questions. All questions are time-consuming; therefore, it is advised to skip lengthy questions and jump to simpler ones to get a fair idea of the entire paper. Solving questions on Data Interpretation, Probability, Profit and Loss, Mensuration, etc., will be helpful. Students consume most of the allotted time in solving DI questions, which can be improved with practice.

  2. Coding Fundamentals: This section comprises basic C programming questions, questions on basic OOPS concepts, microprocessor-based questions, questions on computer networking, and Boolean Algebra. Greater focus was on input-output-based questions rather than writing code. This section is relatively easy and less time-consuming, depending fairly on your knowledge of the above topics.

  3. Area of Specialization selected at the beginning: I had chosen Electronics as my area of specialization. Questions in this section were fairly simple, directly from GATE preparation archives, demanding a strong understanding of courses like Basic Electronics, Digital Electronics, Semiconductor Theory, and VLSI Design. This section might seem tight on time under two conditions: if you are not confident in your solving approach or if you are out of practice.

TECHNICAL INTERVIEWS:

Out of 99 students appearing for the OT, 33 students were called for the Technical Interview Round (Selection Ratio >= 30%).

The students appearing for the Technical Interviews were again segregated into three categories, based on their Area of Specialisation. Generally, the Interview Process comprises of two Technical Discussion Rounds, which may extend to three, followed by an HR Round if you get through convincingly.

Unlike regular interviews, QC Interviews are intriguingly technical and don’t start off with “Introduce Yourself” questions. The interview started with listing down my subjects of comfort. As my profile mostly comprised of projects and internships aligned to VLSI Design, the conversations mostly emphasised on testing my basic concepts of CMOS Circuits. The important questions I faced in my first round were as follows:

ROUND 1 DESCRIPTION:

• Design NAND Gate using 2:1 MUX. Draw a 2 i/p AND Gate using XOR gates.
• Draw a Binary to Gray Code Converter. Explain the steps followed. What are the advantages with Excess 3 Coding?
• Questions on Flip-Flop Conversion. Explain the difference between Moore and Mealy State Models.
• Explain the Concept of Small Signal Analysis. How are MOSFETS used as Inverters and Amplifiers?
• Explain CLM in MOSFETs. Write down the relation between Threshold Voltage & Source to Body Bias.
• Explain DIBL; is it good or bad?
• What are various power losses in digital ICs and CMOS?
• Explain Dynamic Switching Power Losses in context to Digital ICs. Explain other power losses if you know them. How do you minimise Dynamic Switching Power Loss?

After an hour-long discussion on the above topics, I was taken into Communication Engineering, Software Applications & Embedded Systems. Questions were mostly from Digital Signal Processing, Analog & Digital Communication Systems in my second round.

ROUND 2 DESCRIPTION:

• What is Bit Interleaving? Explain the conventional techniques used for Bit Interleaving.
• Draw the Constellation Diagram for QPSK Modulation. Is this diagram the most optimised one? (Relate to Probability of Error)
• What is the Multiplication Property of Fourier Transform? Draw the Fourier Transform of Rect, Sinc and Triangle Waveforms.
• Write down the Properties of Dirac Delta Function.
• What are the Characteristics of Super-Heterodyne Receiver?
• Draw and explain the Block Diagram for QAM System. Define Signal. What are the conditions for Stability & Causality of Signals?
• Derive the Shannon’s Channel Capacity Theorem. Is it possible to achieve infinite data rate?
• What are the differences between Sampling & Quantization? Why is Sampling followed by Quantization and not the other way round?
• Compare FIR and IIR Filters. What is a Linear Phase FIR Filter?
• What are the various search algorithms you are aware of? Explain the Binary Search Algorithm.

ROUND 3 DESCRIPTION:

The Technical Discussion Rounds were followed by an HR Discussion. We discussed more on the Job Profile being offered. It was a very satisfying process for me, with 12 selections from BIT Mesra (Selection Ratio >= 30%).