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Design Verification Engineer Interview Experience

November 12, 2014
Negative ExperienceNo Offer

Process

Applied online via the job portal.

I received a phone interview for the position of Design Verification Engineer at Qualcomm QCT in Santa Clara.

Following the phone interview, I was invited for an onsite interview, which consisted of 4-5 rounds.

The interviewers were very detail-oriented and sought specific implementation details.

Questions

All the questions were pretty basic and related to the fundamentals of logic design and verification.

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Interview Statistics

The following metrics were computed from 14 interview experiences for the Qualcomm Design Verification Engineer role in United States.

Success Rate

36%
Pass Rate

Qualcomm's interview process for their Design Verification Engineer roles in the United States is fairly selective, failing a large portion of engineers who go through it.

Experience Rating

Positive64%
Neutral14%
Negative21%

Candidates reported having very good feelings for Qualcomm's Design Verification Engineer interview process in United States.

Qualcomm Work Experiences