Two 45-minute interviews were conducted. One interviewer focused on circuit design (digital, analog), while the other concentrated on testing with Verilog.
The first interviewer asked about timing, metastability, and how to generate a pulse signal.
The second interviewer presented a memory and a testbench. I was asked to draw some input and output waveforms and write a Verilog program for the testbench.
The interviewer drew two flip-flops, told me the frequency of the clock and input signal, and let me draw the output waveform.
The following metrics were computed from 1 interview experience for the Qualcomm Digital ASIC Design Internship role in United States.
Qualcomm's interview process for their Digital ASIC Design Internship roles in the United States is incredibly easy as the vast majority of engineers get an offer after going through it.
Candidates reported having mixed feelings for Qualcomm's Digital ASIC Design Internship interview process in United States.