The interview was set up for 3 hours.
One person conducted the interview for about an hour, and then the other person interviewed for an hour, at which point the interview concluded.
They asked me about my past experience and past projects. They also inquired about my strong subjects and began the interview focusing on those areas.
What is a deep copy and a shallow copy in SystemVerilog?
Can you explain the sequencer in UVM and its use?
What is a virtual interface and why is it used?
A constraint was given, and I was asked what the randomized values would be.
I was asked to write an assertion for a given scenario.
I was asked to write a constraint to generate even and odd numbers in sequence.
The following metrics were computed from 1 interview experience for the Qualcomm Senior Verification Engineer role in Bengaluru, Karnataka.
Qualcomm's interview process for their Senior Verification Engineer roles in Bengaluru, Karnataka is extremely selective, failing the vast majority of engineers.
Candidates reported having very good feelings for Qualcomm's Senior Verification Engineer interview process in Bengaluru, Karnataka.