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Verification Engineer Interview Experience - New York, New York

October 1, 2012
Positive ExperienceNo Offer

Process

Applied through the company website. I got a call from a staffing specialist two weeks later, and a technical interview was scheduled. The initial technical interview was based on projects, as well as basic questions from Verilog and SystemVerilog. Later, I was questioned on some basic math problems. A week later, I was called for an onsite interview. It consisted of 6-7 rounds. I was asked about FSMs, asynchronous FIFOs, pattern detectors, OOPs concepts, counters, clock dividers, and questions from projects, etc. All the interviewers really made me comfortable. They shared their advice on how to land a job and how I should build my career, etc.

Questions

How will you verify the functionality of an asynchronous FIFO and a dual-port RAM?

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Interview Statistics

The following metrics were computed from 1 interview experience for the Qualcomm Verification Engineer role in New York, New York.

Success Rate

0%
Pass Rate

Qualcomm's interview process for their Verification Engineer roles in New York, New York is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Qualcomm's Verification Engineer interview process in New York, New York.

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