Great place to learn with high-impact projects.
I had a misogynistic manager. It was tough to work under him.
Vhdl, Verilog, and STA were asked, and the questions were mostly based on past experience. The basics of UVM can provide a good edge over others. There was only one interview round, and an offer was made.
Three to four rounds of technical interviews, along with an HR round. (Nowadays, there may be a telephonic screening.) The technical rounds can include core subjects as well as some aptitude questions. Some questions may also arise about your proje
Interviewed for the position of DFT Engineer. It was more of a discussion rather than an interview, with questions related to DFT Architecture, such as: * DFT clocking * Scan partitioning * Scan wrapping
Vhdl, Verilog, and STA were asked, and the questions were mostly based on past experience. The basics of UVM can provide a good edge over others. There was only one interview round, and an offer was made.
Three to four rounds of technical interviews, along with an HR round. (Nowadays, there may be a telephonic screening.) The technical rounds can include core subjects as well as some aptitude questions. Some questions may also arise about your proje
Interviewed for the position of DFT Engineer. It was more of a discussion rather than an interview, with questions related to DFT Architecture, such as: * DFT clocking * Scan partitioning * Scan wrapping