Good company and good future.
No con, as I have spent only 6 months till now.
The process was very good, and the interviewers were very polite. The interview questions required some thought; they were simple, logical questions, if I recall correctly. Overall, this was the best interview I have ever given.
It was a good experience overall. They asked about various concepts in UVM and SystemVerilog, mainly concentrating on UVM. Topics covered included interfaces, modports, driver-sequencer communication, and more. I was also asked about design concepts
Four rounds of technical interviews and one round of HR. The four technical rounds were different and covered various domains such as OS, programming, and wireless technologies. Questions were asked on my previous experience. Knowledge of OS, prog
The process was very good, and the interviewers were very polite. The interview questions required some thought; they were simple, logical questions, if I recall correctly. Overall, this was the best interview I have ever given.
It was a good experience overall. They asked about various concepts in UVM and SystemVerilog, mainly concentrating on UVM. Topics covered included interfaces, modports, driver-sequencer communication, and more. I was also asked about design concepts
Four rounds of technical interviews and one round of HR. The four technical rounds were different and covered various domains such as OS, programming, and wireless technologies. Questions were asked on my previous experience. Knowledge of OS, prog