Team specific: My team has a wonderful atmosphere.
Work-life balance needs to be better.
The process took a few weeks, and the interview was of an average level. They tested technical skills and asked about projects and experience. They were very keen on your skillset and overall knowledge.
It was a good experience overall. They asked about various concepts in UVM and SystemVerilog, mainly concentrating on UVM. Topics covered included interfaces, modports, driver-sequencer communication, and more. I was also asked about design concepts
First, an HR call for assessment. Then, a technical interview for related technical questions and previous experience. The interviewer will most likely give you some hints if you have trouble. Last, a campus show-off.
The process took a few weeks, and the interview was of an average level. They tested technical skills and asked about projects and experience. They were very keen on your skillset and overall knowledge.
It was a good experience overall. They asked about various concepts in UVM and SystemVerilog, mainly concentrating on UVM. Topics covered included interfaces, modports, driver-sequencer communication, and more. I was also asked about design concepts
First, an HR call for assessment. Then, a technical interview for related technical questions and previous experience. The interviewer will most likely give you some hints if you have trouble. Last, a campus show-off.