Qualcomm

Total 4 rounds. 1. Digital design basics like sequence detector, Flip-flops. 2. SI and PDN basics like crosstalk, power delivery network, crosstalk, jitter. 3. Most difficult issue solved. 4. HR round.

Project related technical discussion. Technical discussion in SystemVerilog UVM, protocol knowledge. Given some coding questions. Puzzle questions. Verilog, SystemVerilog, UVM, AXI protocol-based questions. Project architecture and interface signals.

6 technical rounds and 1 HR round. Interviews focus on: * Deep learning and machine learning * Computer vision * Image processing * In-depth and breadth of machine learning * Probability and statistics (required) * Aptitude and problem-solving