Pay is good. Good year-on-year growth.
Work pressure is quite high.
There were 4 technical rounds, each lasting 45 minutes to 1 hour. There was also 1 managerial round. The first two rounds were virtual. The next two rounds of technical interviews were in person. The interviews focused on DV concepts, formal method
Project related technical discussion. Technical discussion in SystemVerilog UVM, protocol knowledge. Given some coding questions. Puzzle questions. Verilog, SystemVerilog, UVM, AXI protocol-based questions. Project architecture and interface signals.
Total 4 rounds. 1. Digital design basics like sequence detector, Flip-flops. 2. SI and PDN basics like crosstalk, power delivery network, crosstalk, jitter. 3. Most difficult issue solved. 4. HR round.
There were 4 technical rounds, each lasting 45 minutes to 1 hour. There was also 1 managerial round. The first two rounds were virtual. The next two rounds of technical interviews were in person. The interviews focused on DV concepts, formal method
Project related technical discussion. Technical discussion in SystemVerilog UVM, protocol knowledge. Given some coding questions. Puzzle questions. Verilog, SystemVerilog, UVM, AXI protocol-based questions. Project architecture and interface signals.
Total 4 rounds. 1. Digital design basics like sequence detector, Flip-flops. 2. SI and PDN basics like crosstalk, power delivery network, crosstalk, jitter. 3. Most difficult issue solved. 4. HR round.