Bad work culture with good pay
Bad work culture with good pay
Salary is good.
A good learning opportunity for freshers.
Personal life is to be sacrificed.
WFH is allowed, but managers don't feel happy about it.
There's a lot of politics. You never know when your termination is coming.
Sometimes work is very hectic, and there's no proper recognition.
Project deadlines are very tight. You may have repetitive work and not learn anything new after a while.
No document access for contractors, no project onboarding training, and no good work given to contractors.
Work culture is very bad. Avoid politics so that employees/contractors will like to stay.
Lots of discrimination are shown against contractors in terms of work given and learning.
Was this helpful?
Qualcomm Interview Questions
Qualcomm Interview Experiences
Software Engineer
There were 2 technical rounds and 1 HR round. The first technical interview involved a coding question of medium level, some OS concepts, and a puzzle. The second interview was a complete coding round, with a hard-level code to be written from scra
Post Silicon Validation Engineer
Had three rounds. 1st and 2nd rounds were purely technical, expecting questions about electronic circuits and programming logic. 3rd round was for a short period and not very technical. It was a casual interaction with a director-level employee fro
Verification Engineer
Mostly focuses on SystemVerilog and UVM basics, plus some basic C & puzzles. It covers mostly fundamental concepts, and the interview level is moderate. Focus on the basics of: * CMOS * Verilog * SystemVerilog * UVM * Analog CMOS
Software Engineer
Bengaluru, Karnataka, IndiaAugust 1, 2021There were 2 technical rounds and 1 HR round. The first technical interview involved a coding question of medium level, some OS concepts, and a puzzle. The second interview was a complete coding round, with a hard-level code to be written from scra
Post Silicon Validation Engineer
Bengaluru, Karnataka, IndiaMay 1, 2024Had three rounds. 1st and 2nd rounds were purely technical, expecting questions about electronic circuits and programming logic. 3rd round was for a short period and not very technical. It was a casual interaction with a director-level employee fro
Verification Engineer
Bengaluru, Karnataka, IndiaApril 1, 2025Mostly focuses on SystemVerilog and UVM basics, plus some basic C & puzzles. It covers mostly fundamental concepts, and the interview level is moderate. Focus on the basics of: * CMOS * Verilog * SystemVerilog * UVM * Analog CMOS
