SoC Design Verification Interview Experience - San Jose, California
Process
Overall, it was a straightforward process.
The hiring manager reached out via email to schedule an interview. I was asked to create a 15-minute presentation regarding my personal background and past projects.
During the interview, I met with two engineers on the team over Zoom. They asked some technical questions and described the role in more detail.
Questions
How would you verify a Verilog design?
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Interview Statistics
The following metrics were computed from 1 interview experience for the Samsung SoC Design Verification role in San Jose, California.
Success Rate
Samsung's interview process for their SoC Design Verification roles in San Jose, California is incredibly easy as the vast majority of engineers get an offer after going through it.
Experience Rating
Candidates reported having very good feelings for Samsung's SoC Design Verification interview process in San Jose, California.
Samsung Work Experiences
- 4.0Overall, a good companyDesign Verification Engineer • Current EmployeeSan Jose, California, United StatesJuly 1, 2025Pros: Good work-life balance and reasonable compensation.Cons: Not good company to develop coding skills.
- 4.0Good benefits and relaxed environmentStaff Firmware Engineer • Former EmployeeSan Jose, California, United StatesMarch 11, 2025Pros: Great benefits and good management.Cons: Can sometimes feel stuck because of lack of communication.
- 5.0WW 1st DRAM, NAND Sol. CompanySoftware Engineer • Former EmployeeSan Jose, California, United StatesMarch 10, 2025Pros: Strong leadership based on top-down work direction.Cons: Long work hours. Salary: barely above the cost of living.
Samsung Interview Questions
