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ASIC Design Nad Verification Interview Experience - San Jose, California

May 1, 2010
Neutral ExperienceNo Offer

Process

Ask about my resume and projects, and ask a simple tech question.

Questions

Nor gate with one input 0 and one input C. What is its output status?

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Interview Statistics

The following metrics were computed from 1 interview experience for the Sandisk ASIC Design Nad Verification role in San Jose, California.

Success Rate

0%
Pass Rate

Sandisk's interview process for their ASIC Design Nad Verification roles in San Jose, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive0%
Neutral100%
Negative0%

Candidates reported having mixed feelings for Sandisk's ASIC Design Nad Verification interview process in San Jose, California.

Sandisk Work Experiences