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Digital ASIC Design Engineer Interview Experience - Hawthorne, California

August 9, 2023
Positive ExperienceGot Offer

Process

1 round: Phone screen with recruiter

2 round: Technical interview with two engineers

3 round: Take home assignment

4 round: Full day on site, partially based on take home assignment

Questions

How to determine if a taped-out chip failed hold/setup timing.

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Interview Statistics

The following metrics were computed from 1 interview experience for the SpaceX Digital ASIC Design Engineer role in Hawthorne, California.

Success Rate

0%
Pass Rate

SpaceX's interview process for their Digital ASIC Design Engineer roles in Hawthorne, California is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for SpaceX's Digital ASIC Design Engineer interview process in Hawthorne, California.

SpaceX Work Experiences