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Design Verification Intern Interview Experience - Federal Way, Washington

October 1, 2024
Positive ExperienceNo Offer

Process

Very informal and laid back.

On-site with one person.

Whole process took about 90 minutes.

It was stated there would be only one interview for the whole process, and that the company usually fills the internship roles by mid-October.

Questions

Make an AND gate from a 2-to-1 mux and make a K-map for that set-up.

Write code (any language) to arrange an N-sized list of numbers in ascending or descending order.

What is set time, hold time, and metastability?

Divide a clock signal by three.

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Interview Statistics

The following metrics were computed from 1 interview experience for the Texas Instruments Design Verification Intern role in Federal Way, Washington.

Success Rate

0%
Pass Rate

Texas Instruments's interview process for their Design Verification Intern roles in Federal Way, Washington is extremely selective, failing the vast majority of engineers.

Experience Rating

Positive100%
Neutral0%
Negative0%

Candidates reported having very good feelings for Texas Instruments's Design Verification Intern interview process in Federal Way, Washington.

Texas Instruments Work Experiences