I participated in the online assessment for Texas Instruments in the digital domain for a full-time role.

The assessment consisted of 20 aptitude questions (30 minutes) and 20 digital electronics questions (45 minutes). For the first time, I came across fill-in-the-blank and integer-type questions in both sections.

I was shortlisted for the interview along with 7 other candidates.

The online interview started with the interviewer asking me to give a brief introduction. They then moved on to my SRAM project titled “Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations.” I was asked to explain how the multiplication was performed and stored, as well as the advantages of this architecture over the von Neumann structure. After that, they asked if I was comfortable with combinational and sequential circuits, followed by related technical questions.

The interview concluded with me asking a question about their work at TI. There were 3–4 people present in the meeting, but only one of them asked the questions. Whenever I got stuck, I requested hints, and the interviewer guided me.

1. They gave an input data stream A0, A1, A2, A3… and asked me to design a circuit such that it calculates the sum of the previous two inputs, one clock cycle later.

For example, when A2 arrives at that clock cycle, the output should be A0 + A1. When A3 arrives, the output should be A1 + A2.

Then they modified the question and asked for the cumulative sum of all previous inputs.

For example, when A2 arrives, the output should be A0 + A1. When A3 arrives, the output should be A0 + A1 + A2.

1. They asked me about 2-bit comparators and the design process. Then they extended the problem: using external logic gates, design a 2-bit comparator assuming you are provided with multiple 1-bit comparators.

The comparator has two inputs and three outputs (A > B, A = B, A < B).

For example, consider two 1-bit comparators for the MSB and LSB. If the MSB comparator gives A > B = 1, then what should we do for the LSB using logic gates? Similarly, what happens when A > B = 0, and so on for all three cases (A > B, A = B, A < B).