Staff Engineer, Design Verification Engineering
Job Description
Analog Devices (NASDAQ: ADI) is seeking a Staff Design Verification Engineer to provide technical leadership in developing verification strategies for complex analog and mixed-signal designs. With revenue exceeding $9 billion and approximately 24,000 employees globally, ADI is at the forefront of bridging physical and digital worlds through innovative semiconductor solutions.
The role demands an experienced professional who will architect sophisticated verification environments, mentor junior engineers, and collaborate across teams to ensure product quality and reliability. Working with limited direction, you'll apply deep technical expertise to solve critical verification challenges while representing ADI in customer interactions.
As a Staff Engineer, you'll be responsible for architecting verification strategies, implementing UVM-based environments, leading debugging efforts, and driving coverage closure. The position requires expert-level knowledge of SystemVerilog, mixed-signal verification methodologies, and advanced debugging skills. You'll also need proficiency in automation tools and scripting languages.
The ideal candidate should have 7-10+ years of relevant experience and an advanced degree in Electrical Engineering or related field. This role offers the opportunity to work on cutting-edge projects that impact various industries including automotive, healthcare, and digital factories. ADI provides a supportive environment focused on professional growth, competitive compensation, and work-life balance.
Join ADI to be part of a team that's shaping the future of technology while working alongside the brightest minds in the industry. Your expertise will contribute to transformative solutions that bridge the physical and digital worlds, making a real impact on how people live, work, and connect.
Responsibilities For Staff Engineer, Design Verification Engineering
- Architect and lead verification strategy for complex digital and mixed-signal designs
- Design and implement UVM-based verification environments
- Guide and mentor junior engineers
- Coordinate work across organizational lines
- Lead complex debugging efforts across RTL and gate-level simulations
- Drive functional and code coverage closure
- Lead post-silicon validation activities
- Serve as principal customer contact on projects
Requirements For Staff Engineer, Design Verification Engineering
- Expert-level knowledge of SystemVerilog and Universal Verification Methodology
- Ability to develop comprehensive verification plans
- Deep understanding of mixed-signal design principles
- Advanced debugging skills across multiple design abstractions
- Extensive experience with electronic design automation tools
- Advanced proficiency in Python, Perl, TCL, or Shell scripting
- MS/PhD in Electrical Engineering, Computer Engineering, or related field
- 7-10+ years of relevant digital design verification experience
Benefits For Staff Engineer, Design Verification Engineering
- Competitive compensation and benefits
- Work-life balance
- Professional growth opportunities
- Collaborative and innovative team environment
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