Design Verification Engineer

Apple is seeking a Design Verification Engineer to join their Hardware Technology organization. This role is crucial for verifying the functionality and performance of Apple's premier SOCs. As part of a dedicated team, you'll be at the heart of the chip design effort, collaborating across all fields in a vertical product model.

The position involves working with various subsystems and IP, including Neural Engine hardware, DRAM subsystem, memory controller logic, encode/decode systems, hardware security, high-speed IO standards, power management, and display subsystems. You'll have the opportunity to either focus deeply on one main IP or expand your breadth across multiple subsystems.

Key responsibilities include reviewing design and architecture specifications, developing test plans and coverage plans, and defining next-generation verification methodology. You'll work closely with design, architecture, and software teams to understand use cases and corner conditions.

The ideal candidate should have strong skills in digital verification, including constrained random verification, functional coverage, and assertion methodology. Knowledge of SystemVerilog, computer architecture, and programming skills in Python or similar languages is essential. The role offers competitive compensation ($162,500 - $286,400) plus benefits including comprehensive medical/dental coverage, stock options, and education reimbursement.

This position offers the chance to work on cutting-edge technology products at Apple, where new ideas quickly become great products and services. You'll be part of a team that values passion, dedication, and innovation, with the opportunity to make significant contributions to Apple's hardware technology advancement.