Design Verification Engineer

Apple is seeking a Design Verification Engineer to join their Hardware Technology team. This role is crucial in verifying the functionality and performance of Apple's premier SOCs. As part of a dedicated team, you'll be at the heart of the chip design effort, collaborating across all fields in a vertical product model.

The position involves working with various IP types including Neural Engine hardware, DRAM subsystems, memory controllers, encode/decode systems, hardware security, high-speed IO standards, power management, and display subsystems. You'll have the opportunity to either focus deeply on one main IP or expand your breadth across multiple subsystems.

Key responsibilities include reviewing design and architecture specifications, developing test plans and coverage plans, and defining next-generation verification methodologies. You'll work closely with design, architecture, and software teams to understand use cases and corner conditions.

The ideal candidate should have strong knowledge of digital verification, including constrained random verification, functional coverage, and assertion methodology. Experience with SystemVerilog, digital simulation, and UVM is essential. Strong programming skills, particularly in Python or similar scripting languages, are required.

Benefits include comprehensive medical/dental coverage, retirement benefits, stock programs, education reimbursement, and potential bonuses. Base pay ranges from $171,600 to $302,200, depending on skills, qualifications, and experience.

This role offers an exciting opportunity to work on cutting-edge technology at one of the world's leading tech companies, with the chance to make significant contributions to Apple's premier SOC designs. Join us in creating the next generation of innovative hardware solutions that power Apple's groundbreaking products.