ASIC RTL Design Engineer
Description For ASIC RTL Design Engineer
Broadcom, a global technology leader in semiconductor and infrastructure software solutions, is seeking an experienced ASIC RTL Design Engineer to join their team in the San Francisco Bay Area. This role offers a competitive salary range of $141,000 - $225,000 with comprehensive benefits.
As an ASIC RTL Design Engineer, you'll work on cutting-edge semiconductor designs, collaborating with system architects to define microarchitecture and develop RTL implementations. You'll be responsible for various aspects of the design process, from verification to timing constraints and performance analysis.
The ideal candidate brings extensive experience in microarchitecture development, RTL design, and front-end flows, with knowledge of protocols like AHB/AXI/CHI and high-speed interfaces. This role requires a strong educational background in Electrical or Computer Engineering, with significant industry experience.
Broadcom offers an excellent compensation package, including competitive base salary, annual bonus potential, and equity compensation. The comprehensive benefits package includes medical, dental, and vision coverage, 401(k) with company matching, ESPP, and various leave benefits.
This is an excellent opportunity for a seasoned engineer to join a leading technology company and work on innovative semiconductor solutions. The role offers both technical challenges and career growth opportunities, working with cross-functional teams across multiple locations.
Responsibilities For ASIC RTL Design Engineer
- Work with system architect to define micro architecture of a design
- Design and develop RTL based on the microarchitecture
- Work with verification team to verify the design
- Run CDC, lint etc. on the design
- Develop timing constraints for the design and perform synthesis
- Collaborate with other teams including emulation, DFT and physical design
- Run performance analysis on the design
- Design and integrate different IP in the subsystem
Requirements For ASIC RTL Design Engineer
- Bachelors degree in Electrical or Computer Engineering and 12+ years of experience or Masters with 10+ years or PhD with 7+ years
- Experience in micro-architecture development, RTL design, front-end flows
- SystemC knowledge is a plus
- Experience with protocols like AHB/AXI/CHI
- Strong domain knowledge of clocking structure
- Experience with high-speed protocols like HBM/DDR/PCIE/NOC is a plus
- Ability to work with teams across multiple locations and time zones
Benefits For ASIC RTL Design Engineer
- Medical, dental and vision plans
- 401(K) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Annual discretionary bonus
- Equity compensation
