Design Implementation Engineer
Description For Design Implementation Engineer
Broadcom is seeking a Design Implementation Engineer to work on design implementation activities related to place and route and/or timing closure. The role involves floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, and physical verification (LVS/DRC). The candidate should be able to drive tools and methodologies to achieve desired PPA metrics.
Key responsibilities include:
- Implementing Broadcom's proven design methodology and milestone flow
- Performing equivalence checks, STA, timing closure, and power optimization
- Implementing timing and functional ECOs
- Working on both block and SoC level design implementation activities
- Developing and validating constraints, performing timing analysis and closure
- Conducting formal verification and ECO implementation
The ideal candidate should have:
- Expertise in place and route and/or timing (constraints, STA)
- Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime
- Full chip tapeout experience based on 7nm and lower technologies
- Strong problem-solving skills and ability to work independently
- Experience working in a global team and dynamic environment
- Excellent communication skills
- Hands-on experience with timing analysis and place and route tools for ASIC/SoC Design
- Worked on tape out of at least 1-2 ASICs in 7nm or lower technologies
Broadcom offers a competitive compensation package, including a base salary range of $107,000 - $190,000, discretionary annual bonus, equity, and comprehensive benefits including medical, dental, vision, 401(k) with company matching, ESPP, and paid time off.
Join Broadcom to be part of a global technology leader and contribute to cutting-edge semiconductor and infrastructure software solutions.
Responsibilities For Design Implementation Engineer
- Work on design implementation activities related to place and route and/or timing closure
- Perform floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, and physical verification (LVS/DRC)
- Drive tools and methodologies to achieve desired PPA metrics
- Implement Broadcom's proven design methodology and milestone flow
- Perform equivalence checks, STA, timing closure, and power optimization
- Implement timing and functional ECOs
- Work on both block and SoC level design implementation activities
- Develop and validate constraints, perform timing analysis and closure
- Conduct formal verification and ECO implementation
Requirements For Design Implementation Engineer
- BS in Electrical Engineering/Computer Engineering or related field and 8+ years of experience, or MS with 6+ years of experience
- Expertise in place and route and/or timing (constraints, STA)
- Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime
- Full chip tapeout experience based on 7nm and lower technologies
- Strong problem-solving skills and ability to work independently
- Experience working in a global team and dynamic environment
- Excellent communication skills
- Hands-on experience with timing analysis and place and route tools for ASIC/SoC Design
- Worked on tape out of at least 1-2 ASICs in 7nm or lower technologies
Benefits For Design Implementation Engineer
- Competitive base salary
- Discretionary annual bonus
- Equity
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
