DFT Engineer
Description For DFT Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a DFT Engineer to join their CSG division. This role presents an exciting opportunity to work on cutting-edge network switching ASIC design and testing.
The position involves leading complex DFx (Design for Test/debug & manufacturability) initiatives from architecture through implementation, verification, and testing. You'll be at the forefront of developing and implementing state-of-the-art testability and debug solutions, working to optimize quality while managing cost efficiency.
As a DFT Engineer, you'll be responsible for driving test quality throughout the product lifecycle, from initial design to production. The role requires expertise in various testability techniques, including SCAN, Built-in-Self-Tests, and Loop-Backs, as well as proficiency with industry-standard tools like Mentor/Siemens DFT Tessent and Cadence DFT tools.
The ideal candidate will bring 2+ years of relevant experience and a bachelor's degree, along with strong analytical and problem-solving skills. You'll work with a collaborative team while maintaining the independence to drive projects forward. The position offers competitive compensation ($81,000-$130,000) plus comprehensive benefits including medical coverage, 401(k) matching, and equity opportunities.
This role is perfect for someone who is passionate about semiconductor testing and quality assurance, enjoys technical challenges, and wants to contribute to developing next-generation technology solutions. Join Broadcom's innovative team and be part of shaping the future of semiconductor technology.
Responsibilities For DFT Engineer
- Drive the test quality of the products from Design to Production
- Participate/contribute in silicon bring-up, characterization, and silicon test
- Define and implement various DFx features
- Lead complex network switching ASIC DFx implementation
- Drive testability, debug and quality optimization
Requirements For DFT Engineer
- Knowledge of Testability techniques and features (SCAN, Built-in-Self-Tests, Loop-Backs etc.)
- Experience with Mentor/Siemens DFT Tessent tool
- Experience with Cadence DFT tools (Modus and Genus)
- Knowledge of JTAG/1500/1687 networks and BSDL, ICL and PDL
- Strong knowledge of logic & circuit design fundamentals
- Working knowledge of TCL, perl
- Experience in MBIST implementation for memories
- Strong Pre/Post Silicon debugging and analytical skills
- Bachelor's degree and 2+ years of related experience
- Must be a team player with good communication skills
Benefits For DFT Engineer
- Medical, dental and vision plans
- 401(K) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Annual discretionary bonus
- Equity compensation
