IC Verification Engineer
Job Description
Broadcom, a leading global technology company specializing in semiconductor and infrastructure software solutions, is seeking a Senior IC Verification Engineer to join their team in San Jose, CA. This role offers a competitive salary range of $120,000 to $192,000, along with comprehensive benefits including medical, dental, vision, 401(k) matching, and equity compensation.
The position requires an experienced professional with 8+ years of experience (or 6+ with a Master's degree) in IC verification, focusing on developing and implementing comprehensive verification strategies for complex semiconductor designs. The role involves architecting testbenches, developing test plans, and ensuring thorough functional coverage of hardware designs.
As an IC Verification Engineer, you'll be responsible for creating scalable and reusable testbenches using industry-standard methodologies like UVM/VMM/OVM, developing pseudo-random tests, and debugging regression failures. Your expertise in System Verilog and object-oriented programming principles will be essential for success in this role.
The ideal candidate should have a strong background in electrical engineering with expertise in verification methodologies and complex protocols like PCIe. You'll work independently while collaborating with design and architecture teams to ensure comprehensive verification coverage and documentation.
Broadcom offers an excellent work environment with opportunities for professional growth and development. The company provides a comprehensive benefits package including healthcare coverage, retirement benefits, and equity participation. This role presents an exciting opportunity to work on cutting-edge semiconductor technology while contributing to a global leader in the technology sector.
Responsibilities For IC Verification Engineer
- Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features
- Architect and develop scalable and re-usable testbenches
- Build pseudo-random tests to verify and get to full Functional coverage
- Debug Regression failures, analyze Functional Coverage gaps and improve tests
- Document verification strategy including Test plans, Verification Environment, pseudo-random tests
- Drive improvements in Verification in terms of quality and efficiency
Requirements For IC Verification Engineer
- Bachelor's degree in Electrical Engineering or related degree and 8+ years related experience or Master's degree in Electrical Engineering and 6+ years experience
- Experience writing and debugging complex test benches
- Good understanding of all aspects of Verification
- Proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
- Exceptionally good command over fundamental OOP principles
- Understanding of complex protocols like PCIe
- Capability to work independently and deliver
- Knowledge of PCI Express protocol preferred
Benefits For IC Verification Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Annual discretionary bonus
- Equity compensation
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