Memory System Designer and Place and Route Engineer
Job Description
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Memory System Designer and Place and Route Engineer to join their Central Engineering Group. This role combines hardware design and software engineering skills, focusing on memory subsystem development. The position offers a competitive salary range of $73,000-$117,000 plus benefits.
The ideal candidate will be responsible for architecting and designing memory subsystems, implementing RTL designs, and handling physical design through place and route. They'll need to manage design closure processes including timing, DRC, LVS, and EM/IR, while also working with gate netlist synthesis. This role requires a unique blend of hardware design expertise and software development skills, particularly in Verilog RTL and Python.
The position offers growth opportunities within Broadcom's innovative environment, working on cutting-edge memory technologies. The company provides comprehensive benefits including medical, dental, and vision insurance, 401(k) matching, stock purchase programs, and various leave benefits. This role is perfect for someone with at least 2 years of experience who is passionate about memory system design and wants to work with a leading technology company.
The role requires strong technical skills combined with excellent communication and leadership abilities. You'll be part of a team developing large memory blocks and subsystems, making this an excellent opportunity for someone looking to advance their career in hardware design and engineering.
Responsibilities For Memory System Designer and Place and Route Engineer
- Architect and design memory subsystems
- Implement RTL of subsystem designs
- Place and route (physical design)
- Design closure: timing, DRC, LVS, EM/IR, etc.
- Gate netlist synthesis
Requirements For Memory System Designer and Place and Route Engineer
- Strong design skills
- Ability to write and debug Verilog RTL code
- Place and route experience
- Experience with STA, DRC, EM/IR tools, and attaining design closure
- Ability to code in Python
- Understanding of synthesis tools and running synthesis
- Capable of running and debugging logical equivalency checkers
- Familiar with memory behavior
- Proficient in writing automation scripts, and tools savvy
- Good communication, interpersonal, and leadership skills
- Motivated, self-driven, and good at multitasking
- Bachelor's degree
Benefits For Memory System Designer and Place and Route Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Annual discretionary bonus
- Equity compensation
