Principal Silicon Validation and Verification Engineer
Description For Principal Silicon Validation and Verification Engineer
Broadcom, a global technology leader in semiconductor and infrastructure software solutions, is seeking a Principal Silicon Validation and Verification Engineer for their San Jose office. This highly visible role focuses on post-silicon validation and characterization of high-speed analog and mixed-signal blocks, working with cutting-edge ASIC products for data center networking. The position offers a competitive salary range of $141,000 - $225,000 plus comprehensive benefits.
The ideal candidate will bring 10+ years of experience with an M.Sc. or 7+ years with a PhD in Electrical/Computer Engineering, specializing in analog and mixed signal IP validation. You'll work with advanced technologies including clock generation, timing IPs, data converters, and SerDes, while collaborating with cross-functional teams to ensure product success.
This role combines technical expertise with leadership, requiring strong analytical thinking and excellent communication skills. You'll have the opportunity to work with state-of-the-art measurement equipment and contribute to next-generation optical I/O development. The position offers growth potential within a leading technology company, competitive compensation, and comprehensive benefits including medical coverage, 401(k) matching, and equity opportunities.
If you're passionate about hardware validation, have a strong background in analog and mixed-signal systems, and want to impact the future of data center networking technology, this role offers an excellent opportunity to advance your career with an industry leader.
Responsibilities For Principal Silicon Validation and Verification Engineer
- Perform post silicon validation and characterization of high-speed analog and mixed-signal blocks
- Collaborate with cross functional teams to launch ASIC products
- Debug compliance test failures of standard I/Os
- Assess design bugs and recommend workarounds
- Work effectively across internal and end customers teams
Requirements For Principal Silicon Validation and Verification Engineer
- M.Sc. in Electrical Engineering or Computer Engineering with 10+ years experience or PhD with 7+ years experience
- Experience in analog and mixed signal IP validation and verification
- Experience with bench test debug and validation of clock generation and timing IPs
- Deep understanding of signal integrity and power integrity
- Experience in test development, debug, and reporting
- Ability to work with Matlab or Python
- Experience with measurement equipment
- Strong analytical thinking and problem-solving skills
- Strong written and verbal communication skills
- Willingness to travel when required
Benefits For Principal Silicon Validation and Verification Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Annual discretionary bonus
- Equity awards
