Systems/Hardware Formal Verification Research Engineer
Description For Systems/Hardware Formal Verification Research Engineer
Galois is seeking a Systems/Hardware Formal Verification Research Engineer to join their mission of ensuring trust in critical systems. This role combines advanced engineering with formal methods expertise, focusing on hardware verification challenges. As a Research Engineer, you'll work in small, collaborative teams to design, develop, and verify safety- and security-critical systems. The position requires expertise in formal verification principles, hardware engineering languages, and system development. You'll be responsible for everything from requirements gathering to implementation and formal verification using theorem provers and model checkers. The company offers a unique employee-owned structure, emphasizing collaboration, innovation, and work-life balance. Benefits include ESOP, comprehensive healthcare, generous PTO, and innovation time. The role requires working from one of Galois' offices in Portland, Arlington, Dayton, or Minneapolis, with a hybrid work arrangement. Must maintain a Secret security clearance. Galois provides an inclusive environment and transparent compensation approach based on results and impact.
Responsibilities For Systems/Hardware Formal Verification Research Engineer
- Requirements gathering and client engagement
- Architecture and design of systems with assurance in mind
- Implementation of robust and user-friendly products
- Formal verification using mechanical reasoning tools
- Testing and validation of systems
- Technology research and development
- Technical infrastructure development
- Development of tools and library code
Requirements For Systems/Hardware Formal Verification Research Engineer
- Bachelor's degree in computer science, electrical or computer engineering, or equivalent (MS or PhD preferred)
- In-depth understanding of formal verification principles, methods, and industry practices
- Experience in logic-based formal verification, formal modeling languages and verification techniques
- Expertise in applying formal property verification on micro-architectures
- Hands-on experience developing systems and applying formal verification techniques
- Knowledge of hardware engineering languages (Chisel, Bluespec, SystemVerilog, Verilog)
- Programming experience in Haskell, Verifiable C, or Rust
- Must hold and retain a Secret security clearance
- Strong customer interaction and communication skills
- Self-motivated with ability to manage deadlines and quality goals
Benefits For Systems/Hardware Formal Verification Research Engineer
- Employee Stock Ownership Plan (ESOP)
- 401(k) retirement plan with 5% employer match and immediate vesting
- Fully paid medical insurance plans
- Dental and vision reimbursement plan
- Health Savings Account (HSA) with generous employer contributions
- Mental health support through employee assistance program
- 5 weeks paid time off
- 9 days paid company holidays
- 16 weeks fully paid parental leave
- 1 week fully paid 'Blue Sky' innovation time
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