Taro Logo

ASIC Design Verification Engineer, Devices and Services

Google organizes the world's information and makes it universally accessible and useful, creating radically helpful experiences through AI, Software, and Hardware.
$156,000 - $229,000
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
Hardware

Job Description

Join Google's Devices & Services team as an ASIC Design Verification Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's direct-to-consumer products. This role combines cutting-edge hardware development with verification expertise, working on products used by millions worldwide.

As part of the R&D team, you'll focus on building verification components, implementing constrained-random testing, and ensuring system verification closure. The position requires deep expertise in digital logic verification using SystemVerilog and standard verification methodologies. You'll work with advanced IP components and interconnects, contributing to the next generation of Google's hardware experiences.

The role offers competitive compensation ($156,000-$229,000 + bonus + equity + benefits) and the opportunity to work with state-of-the-art technology. You'll be verifying complex digital systems, including microprocessor cores and hierarchical memory subsystems, while collaborating with design engineers to deliver functionally correct blocks and subsystems.

This position is ideal for someone with strong technical background in computer architecture and verification methodologies, who is passionate about pushing the boundaries of hardware development. You'll be part of Google's mission to create radically helpful experiences through the combination of AI, Software, and Hardware, making a direct impact on future consumer products.

Last updated 8 hours ago

Responsibilities For ASIC Design Verification Engineer, Devices and Services

  • Plan and execute the verification of the next generation configurable infrastructure IPs, interconnects, and memory subsystems
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM
  • Develop cross-language tools and scalable verification methodologies
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver functionally correct blocks and subsystems

Requirements For ASIC Design Verification Engineer, Devices and Services

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience
  • 8 years of experience with verifying digital logic at RTL level using SystemVerilog or C/C++
  • Experience creating and using verification components and environments in standard verification methodology
  • Experience verifying digital systems using standard IP components/interconnects

Benefits For ASIC Design Verification Engineer, Devices and Services

Medical Insurance
Equity
401k
  • Medical Insurance
  • Equity
  • 401k

Related Jobs

Staff Systems Power Engineer, Pixel

Staff Systems Power Engineer position at Google Pixel team focusing on power management, system optimization, and Android BSP development.

Lead ASIC DFT Engineer

Lead ASIC DFT Engineer position at Google focusing on Design for Testing implementation and automation for complex silicon systems.

Staff Software Engineer, Embedded Systems

Staff Software Engineer position at Google focusing on embedded systems development, requiring extensive experience in software development, testing, and Linux systems.

Chipset Power Architect, Devices and Services, Silicon

Lead chipset power architecture role at Google, focusing on Tensor mobile SoCs optimization and power requirements definition, offering competitive compensation and benefits.

Lead CPU Performance Architect, Silicon

Lead CPU Performance Architect position at Google focusing on processor architecture, performance optimization, and silicon development.