ASIC RTL Integration Engineer

Google is seeking an experienced ASIC RTL Integration Engineer to join their hardware team in Bengaluru. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. The position requires a blend of technical expertise and leadership skills, as you'll be leading a team of RTL engineers while working on cutting-edge hardware development.

The role involves working at the intersection of Google's AI, Software, and Hardware initiatives, contributing to innovations that will shape the next generation of hardware experiences. You'll be responsible for delivering unparalleled performance, efficiency, and integration in Google's hardware products that are used by millions worldwide.

As an ASIC RTL Integration Engineer, you'll lead sub-system and chip-level integration activities, working closely with architecture teams to develop implementation strategies that meet quality, schedule, and performance requirements. The position requires expertise in high-performance design, multi-power domains with clocking, and extensive experience with SoCs and silicon success.

The ideal candidate should have a strong background in ASIC design methodologies, including front quality checks such as Lint, CDC/RDC, Synthesis, and DFT ATPG/Memory BIST. You'll need to demonstrate proficiency in Verilog or System Verilog and have comprehensive knowledge of various hardware components including Process Cores, Interconnects, Debug and Trace, and Security systems.

This is an excellent opportunity for an experienced engineer looking to make a significant impact at one of the world's leading technology companies. You'll be working with cutting-edge technology while contributing to products that help organize the world's information and make it universally accessible and useful.