High Speed Interface Design Engineer, Silicon
Job Description
Google is seeking a High Speed Interface Design Engineer to join their Silicon team, focusing on developing custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware expertise with cutting-edge technology to create innovative solutions that impact millions of users worldwide.
The position requires deep expertise in SERDES design, mixed-signal circuits, and CMOS technology. You'll work on critical components including PLLs, DLLs, differential line drivers, receivers, and CDR circuits. The role involves collaboration across multiple teams to ensure optimal circuit performance and successful silicon implementation.
As a senior technical member, you'll contribute to the full product lifecycle from specification to productization of PHYs. The ideal candidate should have extensive experience with highly scaled CMOS design and familiarity with various high-speed IO specifications like PCIE, MIPI CDPHY, UCIE, and LPDDR.
This is an excellent opportunity for an experienced engineer to work on next-generation hardware experiences at Google, focusing on delivering unparalleled performance, efficiency, and integration. The role offers the chance to work with state-of-the-art technology while contributing to products that have a global impact.
The position is based in either Taipei or Zhubei City, Taiwan, offering the opportunity to work with Google's world-class engineering teams while developing cutting-edge silicon solutions. This role combines technical expertise with strategic thinking to help shape the future of Google's hardware products.
Responsibilities For High Speed Interface Design Engineer, Silicon
- Collaborate with architects and cross-functional teams to define high speed I/O specification and components
- Study specifications, build models and analyze the budget for high speed I/O components
- Perform mixed-signal circuit design, simulation, and verification for critical high speed I/O components
- Collaborate with cross-functional teams, including digital design, layout, verification, and system integration
- Participate in post-silicon validation, debug, and characterization efforts
Requirements For High Speed Interface Design Engineer, Silicon
- Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience
- 8 years of experience with Serializer/Deserializer (SERDES) key sub-blocks design
- Experience with lab bring-up, silicon characterization, and debug of mixed-signal IPs
- Experience with CMOS design, layout and validation
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