Physical Design Flow and Methodology Engineer
Job Description
Google is seeking a Physical Design Flow and Methodology Engineer to join their ML, Systems, & Cloud AI (MSCA) organization. This role is crucial in shaping the future of AI/ML hardware acceleration, specifically working on TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. The position involves developing automated physical design workflows, implementing tools and methodologies for ASIC development, and working with industry-standard EDA tools.
The role combines software engineering with hardware design expertise, requiring strong skills in automation, scripting, and physical design implementation. You'll be part of a team that pushes boundaries in custom silicon solutions, contributing to products used by millions worldwide. The position offers competitive compensation including base salary, bonus, equity, and comprehensive benefits.
Working in Google's Compute Engine environment, you'll be responsible for workflow automation, data management, metric collection, and dashboarding for physical design Electronic Design Automation (EDA) tools. The role involves surveying industry trends, evaluating vendors, and implementing best practices to ensure high-quality ASIC tapeouts.
This is an excellent opportunity for someone with a strong background in electrical engineering and computer science who wants to work at the intersection of hardware and software, contributing to cutting-edge AI/ML technology. The role offers the chance to work with advanced technology while being part of Google's innovative culture and comprehensive benefits package.
Responsibilities For Physical Design Flow and Methodology Engineer
- Architect and implement next generation Physical Design EDA CAD tool workflows for ASIC development
- Collaborate with chip design teams to implement tools and methodologies for physical design in leading edge process nodes
- Develop auditing tools, checkers, and metric dashboards based on APIs from third-party EDA tools
- Own the physical design of blocks and subsystems end-to-end
Requirements For Physical Design Flow and Methodology Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience with EDA tool workflows in a semiconductor environment
- Experience developing automated physical design workflows from RTL to GDS, utilizing Tcl, Python, or Perl
- Experience with physical design implementation and convergence at the block and subsystem levels
Benefits For Physical Design Flow and Methodology Engineer
- Bonus
- Equity
- Benefits package
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