Senior SOC and IP Design Engineer, Google Cloud
Job Description
Join Google Cloud's innovative team as a Senior SOC and IP Design Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's future direct-to-consumer products. As part of the ML, Systems, and Cloud AI (MSCA) organization, you'll work on critical hardware and systems infrastructure that supports all Google services and Cloud operations.
Your role will involve sophisticated SOC and IP design work, including RTL development, synthesis optimization, and ASIC silicon bring-up. You'll be responsible for defining crucial system architecture documents and working with cutting-edge technologies in areas like PCIe, UCIe, DDR, and ARM processors.
The position offers the opportunity to work with world-class engineers in a collaborative, multi-disciplined environment across multiple sites. You'll be contributing to projects that directly impact billions of users worldwide through Google's services and Cloud platform, including innovative work on TPUs and hyperscale computing solutions.
This role combines deep technical expertise in hardware design with the excitement of working on next-generation computing systems. You'll be part of a team that prioritizes security, efficiency, and reliability while pushing the boundaries of what's possible in custom silicon development. The position offers the chance to shape the future of Google's hardware infrastructure while working with the latest tools and technologies in silicon design.
Responsibilities For Senior SOC and IP Design Engineer, Google Cloud
- Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
- Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks
- Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up
- Participate in test plan and coverage analysis of the block and SOC-level verification
- Communicate and work with multi-disciplined and multi-site teams
Requirements For Senior SOC and IP Design Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience with digital logic design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or System Verilog
- Experience with logic synthesis techniques to optimize Register-Transfer Level (RTL) code, performance and power as well as low-power design techniques
- Experience in logic design and debug with Design Verification (DV)
