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Senior SoC and IP Design Engineer, Google Cloud

Google is a global technology company that designs and develops innovative hardware, software, and AI solutions.
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Enterprise SaaS · Cloud

Job Description

Google Cloud is seeking a Senior SoC and IP Design Engineer to join their ML, Systems, & Cloud AI (MSCA) organization. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products and cloud infrastructure. The position offers an opportunity to work on cutting-edge hardware that supports Google's massive-scale services including Search, YouTube, and Cloud services.

The ideal candidate will be part of a team that pushes boundaries in hardware development, contributing to innovations that impact billions of users worldwide. You'll be working on advanced silicon solutions, focusing on high-performance and low-power design techniques, with exposure to modern technologies like DDR/LPDDR and HBM.

The role combines technical expertise in digital logic design, RTL development, and SoC architecture with collaborative teamwork across multiple disciplines and locations. You'll be responsible for everything from block-level design documentation to hands-on RTL coding and verification, ensuring the delivery of high-quality silicon solutions.

Working at Google offers the unique opportunity to shape the future of hyperscale computing while being part of a team that prioritizes security, efficiency, and reliability. The position is based in either Tel Aviv or Haifa, Israel, offering the chance to work with world-class engineers in Google's state-of-the-art facilities.

This is an excellent opportunity for experienced hardware engineers who want to make a significant impact on next-generation computing infrastructure while working with cutting-edge technology in a collaborative, innovative environment.

Last updated 8 hours ago

Responsibilities For Senior SoC and IP Design Engineer, Google Cloud

  • Define block-level design document (interface protocol, block diagram, transaction flow, pipeline)
  • Perform RTL coding in Verilog/SystemVerilog, function/performance simulation debug
  • Participate in synthesis, timing/power closure activities
  • Participate in test plan and coverage analysis of block and SoC-level verification
  • Communicate and work with multi-disciplined and multi-site teams

Requirements For Senior SoC and IP Design Engineer, Google Cloud

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience
  • 8 years of experience with digital logic design principles, RTL design concepts, and languages like Verilog or SystemVerilog
  • Experience with logic synthesis techniques to optimize RTL code, performance and power
  • Experience with design sign-off and quality tools (e.g., Lint, CDC)
  • Experience with SoC or IP architecture

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