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Senior SoC Design Verification Engineer, Google Cloud

A global technology company that specializes in internet-related services and products.
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Staff Software Engineer
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5,000+ Employees
8+ years of experience
Enterprise SaaS · AI

Job Description

Google Cloud is seeking a Senior SoC Design Verification Engineer to join their team developing custom silicon solutions that power Google's direct-to-consumer products. This role is part of the Technical Infrastructure team, focusing on building and maintaining Google's data centers and next-generation platforms.

As a Senior SoC Design Verification Engineer, you'll work within an R&D team to build verification components, implement constrained-random testing, and drive verification closure. You'll be responsible for verifying digital designs as part of the server chip design team, working closely with design and verification engineers on various projects.

The role involves building efficient constrained-random verification environments that thoroughly test designs through their corner-cases to identify potential issues. You'll manage the complete verification life-cycle, from initial planning and test execution to coverage collection and closure.

This position offers the opportunity to shape the future of Google's hardware experiences, delivering unparalleled performance, efficiency, and integration. You'll be working on projects that directly impact millions of users worldwide, contributing to the innovation behind Google's most beloved products.

The ideal candidate should have strong experience in ASIC verification, digital systems, and standard verification methodologies. Knowledge of SystemVerilog, UVM, and formal verification tools is essential. This role requires both technical expertise and collaborative skills, as you'll be working closely with various engineering teams to ensure the delivery of high-quality, functionally correct design blocks.

Last updated 11 hours ago

Responsibilities For Senior SoC Design Verification Engineer, Google Cloud

  • Plan the verification of digital design blocks by fully understanding the design specification
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM
  • Identify and write all types of coverage measures for corner-cases
  • Debug tests with design engineers to deliver functionally correct design blocks
  • Close coverage measures to identify verification holes and show progress towards tape-out

Requirements For Senior SoC Design Verification Engineer, Google Cloud

Linux
  • Bachelor's degree in Electrical Engineering or equivalent practical experience
  • 8 years of experience with creating and using verification components and environments in standard verification methodology
  • Experience verifying digital systems using standard IP components/interconnects
  • Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs