Silicon Networking RTL Design Senior Engineer, Google Cloud
Job Description
Google is seeking a Silicon Networking RTL Design Senior Engineer to join their Google Cloud team, focusing on shaping the future of AI/ML hardware acceleration. This role involves working on cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. The position is part of the ML, Systems, & Cloud AI (MSCA) organization, which is responsible for designing, implementing, and managing hardware, software, machine learning, and systems infrastructure for all Google services and Google Cloud.
The role requires deep expertise in ASIC development, with a focus on developing custom silicon solutions for TPU architecture and its integration within AI/ML-driven systems. You'll be working on ASICs used to accelerate and improve traffic efficiency in data centers, collaborating with various teams including architecture, verification, power and performance, and physical design.
Key responsibilities include owning microarchitecture implementation, working with multiple teams for feature development, driving design methodology, and leading improvements in power, performance, and area optimization. The ideal candidate will have extensive experience in ASIC development, verification, and networking domain expertise.
This position offers the opportunity to work on technology that impacts billions of users worldwide through Google's services and Cloud platform. The role combines hardware engineering with cutting-edge AI/ML applications, making it an exciting opportunity for someone passionate about pushing the boundaries of technology in a global-impact environment.
Responsibilities For Silicon Networking RTL Design Senior Engineer, Google Cloud
- Own microarchitecture and implementation of complex IPs and subsystems in the Networking domain
- Work with Architecture, Firmware, and Software teams to drive feature closure and develop micro-architecture specifications
- Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams
- Identify and lead power, performance, and area improvements for the domains owned
Requirements For Silicon Networking RTL Design Senior Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 8 years of experience in ASIC development with Verilog/SystemVerilog, VHDL
- Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)
- Experience in micro-architecture and design of IPs and subsystems in Networking domain such as packet processing, bandwidth management, congestion control, etc.
Benefits For Silicon Networking RTL Design Senior Engineer, Google Cloud
- Equal opportunity employer
- Global work environment
- Opportunity to impact billions of users
Related Jobs
