Join Google's ML, Systems, and Cloud AI (MSCA) organization as a Senior Physical Design Engineer working on TPU (Tensor Processing Unit) development. In this role, you'll be part of a team developing SoCs used to accelerate machine learning computation in data centers. You'll collaborate with various teams including architecture, verification, power and performance, and physical design to deliver high-quality designs for next-generation data center accelerators.
The position requires expertise in advanced chip design, particularly in areas like clock/voltage domain crossing, Design for Testing (DFT), and low power designs. You'll be working on cutting-edge technology that powers Google's machine learning infrastructure and Cloud services, directly impacting products used by billions of people worldwide.
As part of the team, you'll solve complex technical problems with innovative micro-architecture and practical logic solutions, while evaluating design options with complexity, performance, power, and area in mind. The role offers the opportunity to work on hyperscale computing solutions and contribute to Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
The ideal candidate should have strong experience in VLSI design, SoC cycles, and high-performance computing. Knowledge of System Verilog and TCL scripting is valuable, as is experience with layout verification and design rules. This position offers the chance to work at the intersection of hardware design and machine learning, contributing to Google's next-generation AI infrastructure.