SoC Design/Integration Engineer, Silicon, Google Cloud
Job Description
Join Google Cloud's Silicon team as a SoC Design/Integration Engineer, where you'll be at the forefront of developing custom silicon solutions that power Google's future. As part of the ML, Systems, & Cloud AI (MSCA) organization, you'll work on hardware infrastructure that supports Google's services and Cloud platform, used by billions worldwide.
You'll be responsible for the microarchitecture, implementation, and integration of SoC Chassis and subsystems, working with cutting-edge technologies in ASIC development. The role combines hardware expertise with software knowledge, requiring proficiency in Verilog/SystemVerilog, VHDL, or Chisel, along with scripting languages like Python.
This position offers the opportunity to work on high-impact projects that shape the future of hyperscale computing. You'll be part of a team that prioritizes security, efficiency, and reliability, contributing to Google's global infrastructure that powers services like Search, YouTube, and Google Cloud's Vertex AI platform.
The ideal candidate brings strong experience in ASIC design verification, synthesis, and timing/power analysis, along with expertise in SoC integration domains. You'll collaborate with cross-functional teams, drive design methodology improvements, and optimize power, performance, and area metrics for critical systems.
Working at Google means joining a company committed to innovation and technical excellence, with the resources and scale to make a global impact. You'll be part of a diverse team that values collaboration and creative problem-solving, while enjoying the benefits and growth opportunities that come with working at one of the world's leading technology companies.
Responsibilities For SoC Design/Integration Engineer, Silicon, Google Cloud
- Own microarchitecture, implementation, and integration of SoC Chassis and subsystems
- Perform quality check flows (e.g., Lint, CDC, RDC, VCLP)
- Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams
- Identify and drive power, performance, and area improvements for the domains owned
Requirements For SoC Design/Integration Engineer, Silicon, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 4 years of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)
- Experience in one or more SoC integration domains and flows (e.g., clocking, debug, fabrics, security, or low power methodologies)
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