Standard Cell Layout Design Engineer, Silicon

Join Google's Silicon team to develop custom silicon solutions powering the future of Google's direct-to-consumer products. As a Standard Cell Layout Design Engineer, you'll be part of a team that combines Google's AI, Software, and Hardware expertise to create innovative hardware experiences. The role involves collaborating across multiple teams to develop ASIC and hardware projects, working on mobile SoC sub-systems, and interfacing with various specialized teams including Foundry, Technology, Architecture, and Physical Design.

You'll contribute to projects that directly impact millions of users worldwide, focusing on delivering unparalleled performance, efficiency, and integration. The position requires strong technical expertise in layout design and library exchange format, with opportunities to work with advanced tools like Virtuoso XL and extraction tools.

The ideal candidate should have a strong foundation in Electrical Engineering or Computer Science, with experience in Unix shell scripting and coding. You'll be working in Bengaluru, joining Google's world-class engineering team that's dedicated to creating radically helpful experiences through technology.

This role offers the opportunity to work on cutting-edge hardware projects while being part of Google's mission to organize the world's information and make it universally accessible and useful. You'll be involved in the complete development cycle, from initial design to final implementation, ensuring high-quality deliverables that meet Google's exceptional standards.