System Power Architect, Silicon

Google is seeking a System Power Architect to lead the development of power architecture for their next-generation Tensor mobile SoCs. This is a senior technical position that combines hardware engineering expertise with system-level architectural leadership.

The role involves working at the cutting edge of mobile chip design, optimizing Power-Performance-Area (PPA) under peak current and thermal constraints for Google's custom silicon solutions. You'll be responsible for defining power architecture requirements and working with cross-functional teams across silicon, hardware, and software to deliver industry-leading power efficiency.

As the System Power Architect, you'll define critical aspects of the SoC power architecture, including power states, sequencing, voltage domains, and IP requirements. The position requires deep expertise in peak power management, voltage droop detection and mitigation, adaptive clock distribution, and thermal management.

This is an excellent opportunity for an experienced professional with a strong background in power management and low power design. The role offers competitive compensation ($227,000-$320,000 base salary plus bonus and equity) and the chance to work on products that impact millions of users worldwide.

The position is based in either Mountain View or San Diego, CA, and requires 15+ years of relevant experience. You'll be joining Google's hardware team, which combines AI, software, and hardware expertise to create radically helpful experiences. The role offers the opportunity to shape the future of Google's direct-to-consumer products through innovative silicon solutions.

The ideal candidate will have exceptional leadership and communication skills, along with deep technical expertise in mobile SoC power management architectures and techniques. A master's or PhD in a relevant field is preferred, along with experience in battery technology, concurrency management, and power-aware floorplanning.