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Senior Principal Engineer - Design For Test (DFT)

Marvell provides semiconductor solutions that are essential building blocks of data infrastructure across enterprise, cloud, AI, automotive, and carrier architectures.
Morrisville, NC, USA
$170,800 - $252,750
Embedded
Principal Software Engineer
In-Person
5,000+ Employees
15+ years of experience
Enterprise SaaS · AI · Automotive

Description For Senior Principal Engineer - Design For Test (DFT)

Marvell, a leading semiconductor solutions provider, is seeking a Senior Principal Engineer specializing in Design For Test (DFT) to join their Custom Silicon Engineering team. This role represents a unique opportunity to work on cutting-edge technology that powers data infrastructure across enterprise, cloud, AI, and automotive sectors.

The position involves leading complex DFT/Test implementations for custom ASIC/SoC designs, making it ideal for experienced engineers who want to tackle industry-first challenges. As a senior principal engineer, you'll be responsible for architecting test solutions, implementing various DFT/DFX features, and leading validation efforts for sophisticated multi-die designs that are pushing the boundaries of high compute performance.

The role offers a comprehensive compensation package including base salary, bonus, and equity, along with attractive benefits such as flexible time off, 401k, and health coverage. Working at Marvell means joining a team that's driving purposeful and enduring innovation in the semiconductor industry.

The ideal candidate will bring 15+ years of experience, with at least 12 years specifically in custom chip design. You'll need deep expertise in DFT architecture solutions for both monolithic and MCM designs, strong technical skills across various tools and methodologies, and the ability to mentor and lead teams effectively.

This position offers the opportunity to work on transformative technology that impacts multiple industries while collaborating with talented teams across different geographies. If you're passionate about semiconductor innovation and want to make a significant impact on the future of data infrastructure, this role at Marvell could be your next career milestone.

Last updated a month ago

Responsibilities For Senior Principal Engineer - Design For Test (DFT)

  • Architect, lead and implement DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs
  • Design-for-Test architecture definition and implementation
  • Validation, IP-DFT, STA, pattern generation & post-silicon bring-up and debug
  • Mentor and guide a small team of engineers
  • Define and enhance DFT methodologies and tools

Requirements For Senior Principal Engineer - Design For Test (DFT)

Python
Linux
  • Bachelor's, Master's degree or PhD in Computer Science, Electrical Engineering or related fields
  • Minimum of 15 years of work experience
  • Direct DFT experience with at least 12 years in custom chip design
  • Experience leading DFT execution on several ASICs
  • Hands-on experience in SCAN/MBIST/Validation/STA/IP-DFX/Post-Silicon
  • Thorough knowledge of DFT/Test architecture solutions
  • Strong fundamentals in digital circuit design and logic design
  • Experience with Siemens/Synopsys Tool set
  • Excellent team player with strong communication skills
  • Scripting skills using Python, PERL, Tcl and C-Shell

Benefits For Senior Principal Engineer - Design For Test (DFT)

401k
Medical Insurance
  • Flexible time off
  • 401k
  • Year-end shutdown
  • Floating holidays
  • Paid time off to volunteer
  • Health benefits
  • Base salary + bonus + equity

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