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Senior Physical Design Backend Engineer

NVIDIA is the world leader in accelerated computing, pioneering solutions in AI and digital twins that transform industries.
Backend
Senior Software Engineer
In-Person
5,000+ Employees
5+ years of experience
AI · Hardware

Job Description

NVIDIA, the world leader in accelerated computing, is seeking exceptional Physical Design Engineers to join their Networking Silicon engineering team. This role focuses on developing industry-leading high-speed communication devices that deliver maximum throughput and minimal latency. As a Senior Physical Design Backend Engineer, you'll be working on groundbreaking chip designs in a professional, growth-oriented environment where your contributions directly impact technological advancement.

The position involves complex technical work with timing analysis, constraint generation, and chip closure processes. You'll be responsible for managing chiplet Static Timing Analysis (STA), working with various teams to optimize designs, and contributing to the development of cutting-edge technologies. The role combines hands-on technical work with collaborative team efforts, making it ideal for someone who enjoys both detailed engineering work and cross-functional collaboration.

NVIDIA offers the opportunity to work with some of the industry's most innovative minds and be part of developing solutions that transform major industries through AI and digital twins. The company's commitment to pushing technological boundaries and solving complex challenges makes it an ideal environment for engineers looking to make a significant impact in their field. This role is perfect for a creative, autonomous engineer who thrives on technical challenges and wants to be part of the best physical design team in the industry.

Last updated 7 days ago

Responsibilities For Senior Physical Design Backend Engineer

  • Own chiplet STA, analyze timing results, verify correctness and provide budget for different partitions
  • Generate timing constraints for STA and P&R flow
  • Work on high cell count and high frequency designs, resolving complex timing and congestion problems
  • Shape clock tree and affect work of different teams (Front end, DFT & BE)
  • Run and analyze STA tools, guide group during chip closure process
  • Participate in flows development
  • Take part in ramping up new breaking technologies

Requirements For Senior Physical Design Backend Engineer

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience
  • 5+ years of hands-on STA experience
  • Experience in Prime Time and signoff methodologies
  • Deep understanding of all aspects of Physical construction and Integration
  • Great teammate

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