CPU DV Engineer, Senior
Job Description
Qualcomm is seeking an experienced Senior CPU DV (Design Verification) Engineer to join their team in Cork, Ireland. This role focuses on verifying high-performance and low-power CPUs, with a special emphasis on power management verification. The position requires a deep understanding of CPU architectures and power management features, making it ideal for candidates with strong hardware engineering backgrounds.
The role involves working with cutting-edge technology in CPU verification, requiring expertise in power management features such as clock gating, power gating, and voltage/frequency management. You'll collaborate closely with design teams, system architects, and software teams to ensure comprehensive verification of CPU systems.
As a Senior CPU DV Engineer, you'll be responsible for developing and executing test plans, working with simulation and formal verification methodologies, and debugging complex issues across simulation, emulation, and silicon platforms. The position offers an excellent opportunity to work with advanced verification techniques and contribute to the development of next-generation CPU technologies.
Qualcomm offers a comprehensive benefits package including competitive salary, stock options, performance bonuses, and extensive health coverage. The company provides strong support for professional development through education assistance and creates an environment that promotes both technical excellence and work-life balance.
This role is perfect for experienced engineers who are passionate about CPU verification and want to work with a global leader in semiconductor technology. The position offers significant opportunities for growth and the chance to work on innovative projects that shape the future of mobile and computing technology.
Responsibilities For CPU DV Engineer, Senior
- Responsible for power management verification including Boot, Reset, clock gating, power gating, Voltage/frequency management
- Work closely with design/verification teams within CPU to develop comprehensive test plan
- Use simulation and formal verification methodologies to execute test plans
- Verify power intent through use of methodologies like UPF
- Work closely with system architects, software teams and SoC team to validate system use cases
- Work closely with emulation team to enable verification on emulators and FPGA platforms
- Debug and triage failures in simulation, emulation and/or Silicon
Requirements For CPU DV Engineer, Senior
- BE/BTech degree in CS/EE with 10+ years' experience
- Experience in power management verification
- Implementation of assembly and C language embedded firmware
- Experience in C/C++, scripting languages, Verilog/system Verilog
- Strong understanding of power management features in CPUs and CPU based SoCs
- Experience in verification of power management features
- Good Understanding of CPU architectures and CPU micro-architectures
- In-depth knowledge of digital logic design, micro-processor, debug feature
Benefits For CPU DV Engineer, Senior
- Salary, stock and performance related bonus
- Maternity/Paternity Leave
- Employee stock purchase scheme
- Matching pension scheme
- Education Assistance
- Relocation support
- Life, Medical, Income and Travel Insurance
- Subsidised memberships for physical and mental well-being
- Bicycle purchase scheme
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