CPU Physical Design Verification(PDV) Engineer, Staff

Qualcomm, a leading technology innovator, is seeking a Staff-level CPU Physical Design Verification Engineer in Bangalore. This role focuses on floor-planning expertise for industry-leading CPU core designs, emphasizing scalability and aggressive Power, Performance, and Area (PPA) targets. Working with cutting-edge technology nodes, you'll apply advanced physical design techniques to push CPU performance boundaries.

The position requires extensive experience in physical design verification, including floor-planning, placement, and routing for complex, high-speed designs. You'll collaborate with cross-functional teams, including Physical design, timing, power, and packaging teams, to ensure holistic design convergence. The role involves working with industry-standard tools like Cadence Innovus/Genus and Synopsys Fusion Compiler.

As a Staff Engineer at Qualcomm, you'll have access to world-class benefits, continuous learning opportunities, and the chance to work alongside leading engineering experts. The company offers comprehensive health coverage, financial planning programs, and wellbeing initiatives to support work-life balance.

The ideal candidate will bring 8+ years of experience in top-level floor-planning, strong VLSI design background, and expertise in physical verification flows. You'll need excellent communication skills and the ability to work collaboratively in a team environment. This role offers the opportunity to work on cutting-edge technology while contributing to world-changing innovations in mobile and computing technology.