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Design Verification Engineer

Qualcomm is a global technology leader that develops and commercializes wireless technologies and solutions.
$151,091 - $161,200
Backend
Mid-Level Software Engineer
Hybrid
5,000+ Employees
3+ years of experience
Enterprise SaaS · Hardware

Description For Design Verification Engineer

Qualcomm Atheros, Inc. is seeking a Design Verification Engineer to join their team in Santa Clara, California. This role offers a competitive salary range of $151,091 to $161,200 and presents an exciting opportunity in hardware verification engineering.

The position requires expertise in developing test plans and conducting functional verification on hardware at various levels - IP, sub-system, SoC, and system/architecture - for wireless and wired technologies. The successful candidate will work with SystemVerilog in OVM or UVM verification environments, focusing on Physical and/or Mac Layer verification.

This role sits at the intersection of hardware and software, requiring collaboration with Architects, ASIC designers, and Software Engineers on SoCs for mobile handset and consumer electronic applications. Key responsibilities include writing and implementing feature-based test plans, debugging test failures, running regression tests, and participating in design reviews and project meetings.

Qualcomm offers an impressive benefits package including world-class health coverage, financial planning programs, mental health support, and continuous learning opportunities through tuition reimbursement and mentorship programs. The company's commitment to innovation and technological advancement makes it an ideal place for professional growth.

The position offers a hybrid work arrangement, with some telecommuting options available. Candidates should have either a Master's Degree in Electrical Engineering, Computer Engineering, Computer Science (or related field), or a Bachelor's Degree with three years of relevant experience.

Qualcomm's culture emphasizes collaboration, innovation, and professional development. The company's work impacts lives globally through breakthrough technologies, making this an excellent opportunity for someone looking to contribute to cutting-edge technology development while growing their career in hardware verification engineering.

Join a team that values diverse expertise and fosters an inclusive environment where your ideas can contribute to world-changing innovations. This role offers the chance to work alongside leading engineering and technology experts while developing solutions that shape the future of wireless and wired technologies.

Last updated a day ago

Responsibilities For Design Verification Engineer

  • Develop test plans for hardware functional verification
  • Work with Architects, ASIC designers and Software Engineers
  • Write and implement feature based test plans
  • Debug test failures
  • Run regression and close test plan targets
  • Participate in design reviews and project meetings

Requirements For Design Verification Engineer

  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science or related field
  • OR Bachelor's Degree with 3 years of experience
  • Understanding of hardware verification at IP, sub-system, SoC levels
  • Knowledge of SystemVerilog and OVM/UVM verification environments
  • Experience with Physical and/or Mac Layer verification

Benefits For Design Verification Engineer

Medical Insurance
401k
Mental Health Assistance
Education Budget
  • World-class health coverage for employees and dependents
  • Financial planning and security programs
  • Emotional/mental strength and resilience support
  • Wellbeing programs
  • Tuition reimbursement
  • Mentorship programs
  • Continuous learning and development programs

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