Taro Logo

Physical Design Engineer - Multiple Levels

Leading technology innovator that pushes boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation.
$140,000 - $229,800
Backend
Mid-Level Software Engineer
In-Person
5,000+ Employees
2+ years of experience
AI · Enterprise SaaS

Job Description

Qualcomm, a leading technology innovator, is seeking Physical Design Engineers to join their Digital ASIC Team. This role presents an exciting opportunity to work at the forefront of chip design and implementation, contributing to next-generation technologies that shape the future of communication and data processing.

The position involves working with state-of-the-art tools and technologies to develop and implement complex chips and cores. As a Physical Design Engineer, you'll be responsible for the complete Physical Design Flow of high-speed, low power designs including GPU, Camera, DDR, Modem, and Audio components. The role requires expertise in various aspects of chip design, from floorplanning and power planning to timing optimization and formal verification.

Qualcomm offers a comprehensive benefits package including competitive base salary ($140,000 - $229,800), annual bonuses, RSU grants, and extensive health benefits. The company provides strong career development opportunities through continuous learning programs, tuition reimbursement, and mentorship opportunities.

The ideal candidate will have 2-10+ years of industry experience in physical design, with expertise in tools like Cadence Innovus and Synopsys Fusion Compiler. Strong programming skills in Python, PERL/TCL, and Unix shell scripting are essential. The role offers the opportunity to work with leading engineering experts and contribute to breakthrough technologies that impact lives globally.

Working at Qualcomm means joining a team that values innovation, collaboration, and professional growth. The company's supportive, inclusive culture encourages new ideas and provides resources for employees to reach their full potential. With locations in major tech hubs like San Diego, Santa Clara, and Austin, this role offers the chance to work in dynamic environments alongside industry leaders.

This position is perfect for someone who is passionate about chip design, enjoys solving complex technical challenges, and wants to be part of a team that's pushing the boundaries of what's possible in technology. The role offers both technical depth and career growth opportunities, making it an excellent choice for engineers looking to make a significant impact in the semiconductor industry.

Last updated 2 months ago

Responsibilities For Physical Design Engineer - Multiple Levels

  • Innovate, develop, and implement chips and cores using state-of-the-art tools
  • Complete Physical Design Flow and deliveries of complex, high-speed, low power designs
  • Implement low power implementation methods
  • Perform floorplanning, power planning, IR drop analysis
  • Handle cell placement, clock tree synthesis, routing
  • Perform timing optimization and closure
  • Debug timing violations and implement fixes
  • Perform formal verification

Requirements For Physical Design Engineer - Multiple Levels

Python
Linux
  • Bachelor's degree in Science, Engineering, or related field and 4+ years experience
  • Experience with Physical Design and Place & Route tools (Cadence Innovus/Synopsys Fusion Compiler)
  • Timing closure experience in Synopsys PTSI
  • Formal verification experience
  • Power domain analysis experience
  • Physical verification experience
  • Knowledge of scripting languages (Python, PERL/TCL, Linux/Unix shell and C)

Benefits For Physical Design Engineer - Multiple Levels

Medical Insurance
401k
Equity
  • Competitive annual discretionary bonus program
  • Annual RSU grants
  • Comprehensive health benefits
  • Education and development programs
  • Tuition reimbursement
  • Mentorship programs

Related Jobs

Physical Design Engineer

Physical Design Engineer position at Qualcomm focusing on implementing complex chip designs using state-of-the-art tools and technologies, offering competitive compensation and benefits.

Design Verification Engineer

Design Verification Engineer role at Qualcomm focusing on hardware verification using SystemVerilog in Santa Clara, CA with competitive compensation between $151,091 - $161,200.

Cellular Modem SW Test Engineer

Cellular Modem SW Test Engineer position at Qualcomm Technologies, focusing on testing and validating cellular modem systems with expertise in 3GPP specifications.

System Wireless Test Engineer

System Wireless Test Engineer position at Qualcomm Technologies, focusing on systems-level testing and camera systems development, offering competitive salary and comprehensive benefits in San Diego, CA.

GPU Compiler Engineer

GPU Compiler Engineer position at Qualcomm, focusing on GPU architecture, compiler development, and optimization with 2+ years of experience required.