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Senior Timing Engineer

A leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation.
Cork, Ireland
Backend
Senior Software Engineer
Hybrid
5,000+ Employees
3+ years of experience
Enterprise SaaS

Job Description

Qualcomm is seeking a Senior Timing Engineer to join their team in Cork, Ireland. This role offers a flexible hybrid work arrangement at their brand new, state-of-the-art office in Penrose Dock. The position involves working on cutting-edge ASIC design and timing-related activities, requiring expertise in library characterization, CAD tools, and automation. The ideal candidate will have 3+ years of experience in ASIC design and verification, with strong skills in timing analysis and tool development.

The role offers an excellent opportunity to work with a leading technology innovator, pushing the boundaries of what's possible in communication and data processing transformation. The position combines technical challenges with collaborative work across multiple teams, making it ideal for someone who enjoys both deep technical work and cross-functional collaboration.

Cork, as Ireland's second-largest economic engine, offers an excellent quality of life and is home to over 170 overseas companies. The location provides easy access to Europe through Cork airport, which connects to almost 50 international destinations.

The compensation package is comprehensive, including salary, stock options, performance bonuses, and extensive benefits covering health, wealth, and wellbeing. Qualcomm emphasizes work-life balance, offering flexible working arrangements and support for employees' personal and professional development.

This role would be particularly appealing for experienced timing engineers looking to work on cutting-edge technology while enjoying the benefits of living in a vibrant European city with a strong tech presence. The position offers significant growth potential within a company known for innovation and technical excellence.

Last updated 4 months ago

Responsibilities For Senior Timing Engineer

  • Define, model, design, optimize, verify, validate, implement IP development
  • Create architectures, circuit specifications, logic designs, and system simulations
  • Collaborate across teams to develop implementation strategy
  • Evaluate process flow from high-level design to synthesis
  • Utilize tools/applications to execute architecture and design
  • Write detailed technical documentation for EDA/IP/ASIC projects

Requirements For Senior Timing Engineer

Python
Linux
  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science
  • 3+ years of ASIC design, verification, validation, integration experience
  • 2+ years of experience with architecture and design tools
  • 2+ years of experience with scripting tools and programming languages
  • 2+ years of experience with design verification methods
  • Experience in CAD tools
  • Deep understanding of library characterisation process
  • Strong ability in automating and developing new flows
  • Working knowledge of Spice extraction

Benefits For Senior Timing Engineer

Medical Insurance
Vision Insurance
Dental Insurance
401k
Parental Leave
Education Budget
Mental Health Assistance
Relocation Benefits
  • Salary, stock and performance related bonus
  • Maternity/Paternity Leave
  • Employee stock purchase scheme
  • Matching pension scheme
  • Education Assistance
  • Relocation and immigration support
  • Life, Medical, Income and Travel Insurance
  • Subsidised memberships for physical and mental well-being
  • Bicycle purchase scheme
  • Employee run clubs

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